JPH0526341B2 - - Google Patents

Info

Publication number
JPH0526341B2
JPH0526341B2 JP58030275A JP3027583A JPH0526341B2 JP H0526341 B2 JPH0526341 B2 JP H0526341B2 JP 58030275 A JP58030275 A JP 58030275A JP 3027583 A JP3027583 A JP 3027583A JP H0526341 B2 JPH0526341 B2 JP H0526341B2
Authority
JP
Japan
Prior art keywords
hole
semiconductor layer
layer
interlayer insulating
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58030275A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59155951A (ja
Inventor
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58030275A priority Critical patent/JPS59155951A/ja
Publication of JPS59155951A publication Critical patent/JPS59155951A/ja
Publication of JPH0526341B2 publication Critical patent/JPH0526341B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP58030275A 1983-02-25 1983-02-25 半導体装置の製造方法 Granted JPS59155951A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58030275A JPS59155951A (ja) 1983-02-25 1983-02-25 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58030275A JPS59155951A (ja) 1983-02-25 1983-02-25 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS59155951A JPS59155951A (ja) 1984-09-05
JPH0526341B2 true JPH0526341B2 (en]) 1993-04-15

Family

ID=12299154

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58030275A Granted JPS59155951A (ja) 1983-02-25 1983-02-25 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS59155951A (en])

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61179552A (ja) * 1985-02-05 1986-08-12 Agency Of Ind Science & Technol 半導体装置の製造方法
JPH0622264B2 (ja) * 1985-12-17 1994-03-23 工業技術院長 半導体装置の製造方法
JPS62190743A (ja) * 1986-02-18 1987-08-20 Agency Of Ind Science & Technol 垂直配線の形成方法
JPS62190744A (ja) * 1986-02-18 1987-08-20 Agency Of Ind Science & Technol 垂直配線構造
US4807021A (en) * 1986-03-10 1989-02-21 Kabushiki Kaisha Toshiba Semiconductor device having stacking structure
US5191405A (en) * 1988-12-23 1993-03-02 Matsushita Electric Industrial Co., Ltd. Three-dimensional stacked lsi
DE4400985C1 (de) * 1994-01-14 1995-05-11 Siemens Ag Verfahren zur Herstellung einer dreidimensionalen Schaltungsanordnung

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51118975A (en) * 1975-03-19 1976-10-19 Hitachi Ltd Photo controll semiconductor unitegrated circuit device

Also Published As

Publication number Publication date
JPS59155951A (ja) 1984-09-05

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